CS 232: Project 2

Title image Fall 2021

Project 2: Double Sevens

Due Monday 27 September 2021

Purpose: to give you more experience with digital design components and introduce you to VHDL.


Tasks

  1. 7-Segment Display Driver

    There are four 7-segment displays on the DE1 board (User Manual). Each one consists of seven individual bars which can be used to create numbers or letters. Your circuit should light up the proper segments to display a hexadecimal number when given the corresponding 4-bit binary integer value as input.

    1. If you are using Quartus and the board, follow these instructions

      + (more detail)

      1. Within your project2 directory, make a new subdirectory and a new Quartus project for this task (e.g. call it task1 or displayTest).

        In a file named hexdisplay.vhd, create a circuit that takes in four bits and outputs 7 bits indicating which segments in a 7 segment display should be lit. It should work for the hexadecimal characters 0-9,A-F. Make sure you differentiate the 6 and the b. The port for hexdisplay.vhd should have in input signal of type UNSIGNED(3 downto 0) and an output signal of type UNSIGNED(6 downto 0).

        Add the hexdisplay.vhd to the project and create a symbol file from it.

      2. Create a top-level design file (bdf) to demonstrate the 7-segment driver circuit using an 8-bit counter that drives two seven segment displays. This will require you to include two of your 7-segment display drivers and a clock-driven counter. Until now, we have been simulating the clock with a pushbutton. You are welcome to do that (and if you do, use an 8-bit counter). But if you want to just start the circuit and watch the numbers advance, then you might want to use the built-in 24MHz clock. That will go very quickly (24 mHz!). To see the numbers, you should use a 24-bit counter and use the highest 8 bits (the ones that change the least frequently) as the input to your 7-segment drivers.

      3. Test this circuit using the board (if you want to use the built-in clock, then use pin A12).
      4. Take a screen capture of your circuit designs and include them in your wiki page project report.

    2. If you are not using the boards, follow these instructions.

      + (more detail)

      1. Create a new subdirectory for the project. In a file named hexdisplay.vhd, implement a circuit that takes in four bits and outputs 7 bits indicating which segments in a 7 segment display should be lit. It should work for the hexadecimal characters 0-9,A-F. Make sure you differentiate the 6 and the b. The port for hexdisplay.vhd should have in input signal of type UNSIGNED(3 downto 0) and an output signal of type UNSIGNED(6 downto 0).
      2. Write a VHDL testbench file that counts from 0 to 15 (F) and uses boxdriver to supply the output for one 7-segment display.

        Use ghdl and gtkWave (or the Python animation tool) to debug your driver.

      3. Now test it with an 8-bit counter, sending the output to two 7-segment displays. You can write the code yourself or download this testbench file and 8-bit counter.

        ghdl -a hexbench2.vhd hexdisplay.vhd counter8.vhd
        ghdl -e hexbench2
        ghdl -r hexbench2 --vcd=hexbench2.vcd

      4. Use vcd_movie.py, hexbench2.vcd, and a new mapping file to run an animation of the latter simulation and record it as a movie. Upload the movie to your wiki page (or upload it to google docs and include a link to the movie, making sure the link works for anyone signed into Colby's google suite).
  2. Add Two Numbers

    In this task, we implement an adder for two four-bit unsigned integers and display the sum as a hexadecimal number in two 7-segment displays.

    1. If you are using Quartus and the board, follow these instructions

      + (more detail)

      1. Within your project2 directory, make a new subdirectory and a new Quartus project for this task (e.g. call it task2 or addIt). Using either VHDL or graphic design, create a circuit that takes in two 4-bit binary numbers and outputs their sum as a 5-bit binary number. If you use the graphic design tool, you are free to use standard design elements from the Altera library. If you use VHDL, make use of the ieee.numeric_std.all package and make your inputs the type UNSIGNED.

        Note that you will probably want to convert the two 4-bit inputs into 5-bit signals prior to executing the addition in VHDL. Then the result of the addition is a 5-bit signal you can assign to the output signal variable. The concatenation operator in VHDL is the ampersand: &. The following expression concatenates the bit '1' with the bit string "0010". The result would be the bit string "10010".

        '1 & "0010"

        Given two vector signals A and B that are type UNSIGNED (3 downto 0), you could make them 5-bit numbers, add them together, and assign them to a signal of type UNSIGNED (4 downto 0) using the following signal assignment statement.

        C <= ('0' & A) + ('0' & B);

        Note that the above statement does not correctly handle the case where A and B are regarded as 2s complement numbers. How would you change the circuit to work for 2's complement instead of unsigned?

        Use the 8 switches on the board to control the two inputs. Display the output on the board's 7-segment display as two hexadecimal digits. Note that the most significant hexadecimal digit will always be a 0 or 1, since the output of the circuit is only a 5-bit number.

      2. Test your final circuit. Include a movie (or link to a movie) demonstrating your working circuit in your project report. If you drew the circuit in a BDF file, then also include in your report in a screen capture of the circuit. If you wrote only VHDL code, then turn in that code on Courses.
    2. If you are not using the boards, follow these instructions.

      + (more detail)

      1. Within your project2 directory, make a new subdirectory and for this task (e.g. call it task2 or addIt). Using VHDL, create a circuit that takes in two 4-bit binary numbers and outputs their sum as a 5-bit binary number. At the top of your VHDL file, be sure to use ieee.numeric_std.all and make your inputs the type UNSIGNED.

        Note that you will probably want to convert the two 4-bit inputs into 5-bit signals prior to executing the addition in VHDL. Then the result of the addition is a 5-bit signal you can assign to the output signal variable. The concatenation operator in VHDL is the ampersand: &. The following expression concatenates the bit '1' with the bit string "0010". The result would be the bit string "10010".

        '1 & "0010"

        Given two vector signals A and B that are type UNSIGNED (3 downto 0), you could make them 5-bit numbers, add them together, and assign them to a signal of type UNSIGNED (4 downto 0) using the following signal assignment statement.

        C <= ('0' & A) + ('0' & B);

        Note that the above statement does not correctly handle the case where A and B are regarded as 2s complement numbers. How would you change the circuit to work for 2's complement instead of unsigned?

        Write a testbench file that generates values for two 4-but UNSIGNED numbers, sends them to the adder circuit, and then directs the last 4 bits of the output to one hexdisplay port map and the first bit (along with 3 zeros, pre-pended to it) to a second hexdisplay port.

      2. Test your final circuit with ghdl and vcd_movie.py. Include a movie (or link to a movie) demonstrating your working circuit in your project report.

Extensions


Report

Create a wiki page with your report. For each task, write a short description of the task, in your own words.


Handin

Give your wiki page the label cs232f21project2.

Put your bdf/VHDL files in a folder called project2 in your private subdirectory on Courses/CS232.